Transistor structure with minimized parasitics and method of fabricating the same
A transistor having minimized parasitics is provided including an emitter having a recessed extrinsic emitter portion atop an intrinsic emitter portion; a base including an intrinsic base portion in electrical contact with the intrinsic emitter portion and an extrinsic base portion in electrical con...
Saved in:
| Main Authors | , |
|---|---|
| Format | Patent |
| Language | English |
| Published |
05.01.2010
|
| Subjects | |
| Online Access | Get full text |
Cover
Loading…
| Abstract | A transistor having minimized parasitics is provided including an emitter having a recessed extrinsic emitter portion atop an intrinsic emitter portion; a base including an intrinsic base portion in electrical contact with the intrinsic emitter portion and an extrinsic base portion in electrical contact with the intrinsic base portion and electrically isolated from the recessed extrinsic emitter portion by a set of emitter/base spacers; and a collector in electrical contact with the intrinsic base portion. The transistor may further include extrinsic base having top surfaces entirely silicided to the emitter/base spacer. Additionally, the transistor may include a base window opening within the transistor's active area. Methods of forming the above-described transistor are also provided. |
|---|---|
| AbstractList | A transistor having minimized parasitics is provided including an emitter having a recessed extrinsic emitter portion atop an intrinsic emitter portion; a base including an intrinsic base portion in electrical contact with the intrinsic emitter portion and an extrinsic base portion in electrical contact with the intrinsic base portion and electrically isolated from the recessed extrinsic emitter portion by a set of emitter/base spacers; and a collector in electrical contact with the intrinsic base portion. The transistor may further include extrinsic base having top surfaces entirely silicided to the emitter/base spacer. Additionally, the transistor may include a base window opening within the transistor's active area. Methods of forming the above-described transistor are also provided. |
| Author | JENG SHWU-JEN GREENBERG DAVID R |
| Author_xml | – fullname: GREENBERG DAVID R – fullname: JENG SHWU-JEN |
| BookMark | eNqNyjsOwjAMANAMMPC7gy_AUqAVKwjEiihzZRKXWCJOFbtC4vQsHIDpLW_uJpKFZu7aFhRltVxArYzexkLwZouQWDjxhwIMWFDZ2CugBEhkMQfIPfT4KOzRWJ5gkUAx0dJNe3wprX4uHJxP7fGypiF3pAN6ErLufmvqbbWr94dq80f5AgW-Od8 |
| ContentType | Patent |
| DBID | EVB |
| DatabaseName | esp@cenet |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Medicine Chemistry Sciences |
| ExternalDocumentID | US7642569B2 |
| GroupedDBID | EVB |
| ID | FETCH-epo_espacenet_US7642569B23 |
| IEDL.DBID | EVB |
| IngestDate | Fri Jul 19 15:27:36 EDT 2024 |
| IsOpenAccess | true |
| IsPeerReviewed | false |
| IsScholarly | false |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-epo_espacenet_US7642569B23 |
| Notes | Application Number: US20090366425 |
| OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20100105&DB=EPODOC&CC=US&NR=7642569B2 |
| ParticipantIDs | epo_espacenet_US7642569B2 |
| PublicationCentury | 2000 |
| PublicationDate | 20100105 |
| PublicationDateYYYYMMDD | 2010-01-05 |
| PublicationDate_xml | – month: 01 year: 2010 text: 20100105 day: 05 |
| PublicationDecade | 2010 |
| PublicationYear | 2010 |
| RelatedCompanies | INTERNATIONAL BUSINESS MACHINES CORPORATION |
| RelatedCompanies_xml | – name: INTERNATIONAL BUSINESS MACHINES CORPORATION |
| Score | 2.7546406 |
| Snippet | A transistor having minimized parasitics is provided including an emitter having a recessed extrinsic emitter portion atop an intrinsic emitter portion; a base... |
| SourceID | epo |
| SourceType | Open Access Repository |
| SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| Title | Transistor structure with minimized parasitics and method of fabricating the same |
| URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20100105&DB=EPODOC&locale=&CC=US&NR=7642569B2 |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3NS8MwFH-MKepNp-L84h2kt-K6fh-K0HZjCG7TbbLbaLJUelg3bEXwr_cl7aYXvYUEQl7Iy_v-PYA7r8O7wuVd3WdLGWZMfZ1eSap7TmJwlpikQasE2aEzmFmPc3vegGxbC6NwQj8VOCJxFCd-L9V_vflxYsUqt7K4ZxlNrR_60yDWauvYUA0ftTgMeuNRPIq0KApmE234ErikZ9uOH9JvvSe1aAmz33sNZVHK5rdE6R_D_pg2y8sTaIi8BYfRtvFaCw6e6ng3DWvWK07hWUkVBeqBFejrx7tA6UZFCQ-yyr7EEiWQt0zC4gUm-RKr9tC4TjFNWNUPKH9DUvmwSFbiDLDfm0YDnc622N3DYjbZUWGeQzNf5-ICkCw4k3muz7njWazLmN-xhZBmjuEljpW2of3nNpf_rF3BURUpN_SOfQ1NokzckAAu2a26um-Jd4wn |
| link.rule.ids | 230,309,786,891,25594,76906 |
| linkProvider | European Patent Office |
| linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3NT8IwFH8haMSbokb87MHstshgn4fFZBsEFQYKGG5k7TqyA4M4jIl_va_dQC96a9qk6Wv6-r5_D-DObrIWt1hLdWgswoyJo-IrSVTbjDRGozZq0DJBNjR7U_1pZswqkG5rYSRO6KcER0SOYsjvG_lfr3-cWIHMrczvaYpTq4fuxA2U0jrWZMNHJfDczmgYDH3F993pWAlfXQv1bMN0PPyt9ywBzis0pzdPFKWsf0uU7hHsj3CzbHMMFZ7VoeZvG6_V4WBQxrtxWLJefgIvUqpIUA9SgL5-vHMi3KhEwIMs0y8eEwHkLZKwWE6iLCZFe2iySkgS0aIfULYgqPKRPFryUyDdzsTvqXi2-e4e5tPxjor2GVSzVcbPgaAF16a25TBm2jptUeo0Dc6FmaPZkaknDWj8uc3FP2u3UOtNBv15_zF8voTDImquqU3jCqpIJb9GYbyhN_IavwFAzo8U |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Transistor+structure+with+minimized+parasitics+and+method+of+fabricating+the+same&rft.inventor=GREENBERG+DAVID+R&rft.inventor=JENG+SHWU-JEN&rft.date=2010-01-05&rft.externalDBID=B2&rft.externalDocID=US7642569B2 |