Transistor structure with minimized parasitics and method of fabricating the same

A transistor having minimized parasitics is provided including an emitter having a recessed extrinsic emitter portion atop an intrinsic emitter portion; a base including an intrinsic base portion in electrical contact with the intrinsic emitter portion and an extrinsic base portion in electrical con...

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Bibliographic Details
Main Authors GREENBERG DAVID R, JENG SHWU-JEN
Format Patent
LanguageEnglish
Published 05.01.2010
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A transistor having minimized parasitics is provided including an emitter having a recessed extrinsic emitter portion atop an intrinsic emitter portion; a base including an intrinsic base portion in electrical contact with the intrinsic emitter portion and an extrinsic base portion in electrical contact with the intrinsic base portion and electrically isolated from the recessed extrinsic emitter portion by a set of emitter/base spacers; and a collector in electrical contact with the intrinsic base portion. The transistor may further include extrinsic base having top surfaces entirely silicided to the emitter/base spacer. Additionally, the transistor may include a base window opening within the transistor's active area. Methods of forming the above-described transistor are also provided.
Bibliography:Application Number: US20090366425