Comparator and method with controllable threshold and hysteresis

• Main Author: TRIFONOV DIMITAR T
• Format: Patent
• Language: English
• Published: 29.09.2009
• Subjects: BASIC ELECTRONIC CIRCUITRY; ELECTRICITY; PULSE TECHNIQUE

A comparator (12A,12B) includes a first differential input stage (10) including first (MN2) and second (MN3) input transistors and a load (MP9,MP10), the first input transistor (MN2) having a gate, source, and drain coupled to a first input voltage (Vin-), a first tail current source, and the load, respectively. The second input transistor has a gate and source coupled to a second input voltage (Vin+) and a first tail current source. A second differential input stage (11) includes a third (MN4) and fourth (MN5) input transistors, the third input transistor having a gate and source coupled to a first reference voltage (Vref+) and the second tail current source, respectively. The fourth input transistor (MN5) has a gate and a source coupled to a second reference voltage (Vref-) and the second tail current source, respectively. Drains of the third and fourth input transistors are coupled to the load. An output stage (6A) produces a comparator output voltage (Vout) in response to an output (V2) produced by the first and second (11) differential input stages. A switching threshold of the comparator is determined by a difference between the first and second reference voltages.