Methods for manufacturing SOI substrate using wafer bonding and complementary high voltage bipolar transistor using the SOI substrate

A method of manufacturing an SOI substrate for semiconductor devices is described. The method includes forming a low density impurity region in a first semiconductor substrate and a high density impurity region in the low density impurity region, forming a trench surrounding the low density impurity...

Full description

Saved in:
Bibliographic Details
Main Authors KIM JONG-HWAN, JEONG CHANG-BEOM, CHA GI-HO, CHOI MUN-HEUI
Format Patent
LanguageEnglish
Published 01.09.2009
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online AccessGet full text

Cover

More Information
Summary:A method of manufacturing an SOI substrate for semiconductor devices is described. The method includes forming a low density impurity region in a first semiconductor substrate and a high density impurity region in the low density impurity region, forming a trench surrounding the low density impurity region and the high density impurity region, the depth of the trench being deeper than the high density impurity region and shallower than the low density impurity region, forming an insulating layer on the surface of the first semiconductor substrate to fill the inside of the trench, attaching a second semiconductor substrate on the surface of the insulating layer, and removing a part of the first semiconductor substrate so that the bottom of the trench is exposed.
Bibliography:Application Number: US20050072373