Method of manufacturing a semiconductor device having a cell area with a high device element density
A method for manufacturing a semiconductor device including providing a semiconductor substrate including a cell area formed with relatively high device element density and a scribe line area formed with a device element density lower than the device element density of the cell area. An insulating l...
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Main Author | |
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Format | Patent |
Language | English |
Published |
23.06.2009
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Subjects | |
Online Access | Get full text |
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Summary: | A method for manufacturing a semiconductor device including providing a semiconductor substrate including a cell area formed with relatively high device element density and a scribe line area formed with a device element density lower than the device element density of the cell area. An insulating layer is deposited over the semiconductor substrate. The insulating layer is planarized through a chemical mechanical polishing (CMP) process including a first polishing step and a second polishing step having different removal rates with respect to the insulating layer formed over the cell area and the scribe area. |
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Bibliography: | Application Number: US20060616275 |