Method of manufacturing a semiconductor device having a cell area with a high device element density

A method for manufacturing a semiconductor device including providing a semiconductor substrate including a cell area formed with relatively high device element density and a scribe line area formed with a device element density lower than the device element density of the cell area. An insulating l...

Full description

Saved in:
Bibliographic Details
Main Author MIN DAE HONG
Format Patent
LanguageEnglish
Published 23.06.2009
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:A method for manufacturing a semiconductor device including providing a semiconductor substrate including a cell area formed with relatively high device element density and a scribe line area formed with a device element density lower than the device element density of the cell area. An insulating layer is deposited over the semiconductor substrate. The insulating layer is planarized through a chemical mechanical polishing (CMP) process including a first polishing step and a second polishing step having different removal rates with respect to the insulating layer formed over the cell area and the scribe area.
Bibliography:Application Number: US20060616275