Shared memory multiprocessor system

In a shared memory multiprocessor system, data reading accesses and data write-back completion notifications are selected in synchronism with all of the nodes to order them. In each of the nodes, a subject address of ordered data reading access is compared with a subject address of ordered data writ...

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Bibliographic Details
Main Authors FUJIWARA SHISEI, MURATA NORIHIKO, YASUI TAKASHI
Format Patent
LanguageEnglish
Published 17.03.2009
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Summary:In a shared memory multiprocessor system, data reading accesses and data write-back completion notifications are selected in synchronism with all of the nodes to order them. In each of the nodes, a subject address of ordered data reading access is compared with a subject address of ordered data write-back completion notification to detect a data reading operation of the same address which is passed by the completion of the data writing-back operation. Both a data reading sequence and a data writing-back sequence are determined. At this time, such a coherency response for prompting a re-reading operation of the data is transmitted to the node which transmitted the data reading access, so that coherency of the data is maintained.
Bibliography:Application Number: US20060434742