Partition-based incremental implementation flow for use with a programmable logic device

A method of incremental flow for a programmable logic device can include identifying elements of a hardware description language representation of a circuit design and specifying a hierarchy of partitions for selected ones of the elements. Portions of implementation data from a prior implementation...

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Bibliographic Details
Main Authors STIEHL WILLIAM W, SHIFLET ERIC, LEAVESLEY, III W. STORY, OCHOTTA EMIL S
Format Patent
LanguageEnglish
Published 10.02.2009
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A method of incremental flow for a programmable logic device can include identifying elements of a hardware description language representation of a circuit design and specifying a hierarchy of partitions for selected ones of the elements. Portions of implementation data from a prior implementation flow for the circuit design can be associated with corresponding partitions. Selected portions of the implementation data from the prior implementation flow for at least one partition can be re-used during an incremental flow of the circuit design.
Bibliography:Application Number: US20060501156