Non-volatile semiconductor memory device

A non-volatile semiconductor memory device including a NAND cell unit with a plurality of electrically rewritable and non-volatile memory cells connected in series, a source line coupled to one end of the NAND cell unit, and a bit line coupled to the other end of the NAND cell unit, wherein the NAND...

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Bibliographic Details
Main Author HOSONO KOJI
Format Patent
LanguageEnglish
Published 02.09.2008
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A non-volatile semiconductor memory device including a NAND cell unit with a plurality of electrically rewritable and non-volatile memory cells connected in series, a source line coupled to one end of the NAND cell unit, and a bit line coupled to the other end of the NAND cell unit, wherein the NAND cell unit is biased in a data write mode as follows: a write voltage Vpgm is applied to a control gate of a selected memory cell in the NAND cell unit; a channel-isolating voltage is applied to control gates of non-selected memory cells disposed on the source line side of the selected memory cell at intervals of a certain number of memory cells; and a write medium voltage Vm lower than Vpgm is applied to control gates of the remaining non-selected memory cells.
Bibliography:Application Number: US20060512325