Switched-capacitor circuit with time-shifted switching scheme

A switched-capacitor circuit for sampling a pair of differential input signals includes a first bootstrapped switch and a first non-boosted switch connected in parallel between a first output terminal of an amplifier and a first feedback node of the switched-capacitor circuit to form a first feedbac...

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Bibliographic Details
Main Author MIN BYUNG-MOO
Format Patent
LanguageEnglish
Published 09.10.2007
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A switched-capacitor circuit for sampling a pair of differential input signals includes a first bootstrapped switch and a first non-boosted switch connected in parallel between a first output terminal of an amplifier and a first feedback node of the switched-capacitor circuit to form a first feedback signal path and a second bootstrapped-switch and a second non-boosted switch connected in parallel between a second output terminal of the amplifier and a second feedback node of the switched-capacitor circuit to form a second feedback signal path. The first and second non-boosted switches are controlled by a first clock signal and the first and second bootstrapped switches are controlled by a second clock signal where the second clock signal is the first clock signal delayed by a predetermined amount.
Bibliography:Application Number: US20050258686