Critical dimension control for integrated circuits

Methods of etching substrates with small critical dimensions and altering the critical dimensions are disclosed. In one embodiment, a sulfur oxide based plasma is used to etch an amorphous carbon hard mask layer. The features of a pattern can be shrunk using a plasma etch to reduce the resist elemen...

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Bibliographic Details
Main Authors HWANG DAVID K, ABATCHEV MIRZAFER K, VELTROP ROBERT G
Format Patent
LanguageEnglish
Published 18.09.2007
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Methods of etching substrates with small critical dimensions and altering the critical dimensions are disclosed. In one embodiment, a sulfur oxide based plasma is used to etch an amorphous carbon hard mask layer. The features of a pattern can be shrunk using a plasma etch to reduce the resist elements on the surface of the masking structure. Features in the pattern can also be enlarged by depositing polymer on the resist elements or by sloping an underlying layer. In one preferred embodiment, features of the pattern are shrunk before being enlarged in order to reduce line edge roughness.
Bibliography:Application Number: US20040931772