Apparatus and method for customized burn-in of cores on a multicore microprocessor integrated circuit chip

An apparatus and method for providing a multi-core integrated circuit chip that reduces the cost of the package and board while optimizing performance of the cores for use with a single voltage plane. The apparatus and method of the illustrative embodiments make use of a dynamic burn-in technique th...

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Bibliographic Details
Main Authors SHAPIRO MICHAEL J, DAVES GLENN G, HARIDASS ANAND, AUDET JEAN, CAPPS, JR. LOUIS B, FERRIS JOANNE, NEWHART RONALD E
Format Patent
LanguageEnglish
Published 11.09.2007
Subjects
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Summary:An apparatus and method for providing a multi-core integrated circuit chip that reduces the cost of the package and board while optimizing performance of the cores for use with a single voltage plane. The apparatus and method of the illustrative embodiments make use of a dynamic burn-in technique that optimizes all of the cores on the chip to run at peak performance at a single voltage. Each core is burned-in with a customized burn-in voltage that provides uniform power and performance across the whole chip. This results in a higher burn-in yield and lower overall power in the integrated circuit chip. The optimization of the cores to run at peak performance at a single voltage is achieved through use of the negative bias temperature instability affects on the cores imparted by the burn-in voltages applied.
Bibliography:Application Number: US20060426646