pHEMT with barrier optimized for low temperature operation
In one embodiment, a semiconductor device ( 500 ) includes a buffer layer ( 504 ) formed over a substrate ( 502 ). An AlxGa1-xAs layer ( 506 ) is formed over the buffer layer ( 504 ) and has a first doped region ( 508 ) formed therein. An InxGa1-xAs channel layer ( 512 ) is formed over the AlxGa1-xA...
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Main Authors | , , , , , , , |
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Format | Patent |
Language | English |
Published |
07.08.2007
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Subjects | |
Online Access | Get full text |
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Summary: | In one embodiment, a semiconductor device ( 500 ) includes a buffer layer ( 504 ) formed over a substrate ( 502 ). An AlxGa1-xAs layer ( 506 ) is formed over the buffer layer ( 504 ) and has a first doped region ( 508 ) formed therein. An InxGa1-xAs channel layer ( 512 ) is formed over the AlxGa1-xAs layer ( 506 ). An AlxGa1-xAs layer ( 518 ) is formed over the InxGa1-xAs channel layer ( 512 ), and the AlxGa1-xAs layer ( 518 ) has a second doped region formed therein. A GaAs layer ( 520 ) having a first recess is formed over the AlxGa1-xAs layer ( 518 ). A control electrode ( 526 ) is formed over the AlxGa1-xAs layer ( 518 ). A doped GaAs layer ( 524 ) is formed over the undoped GaAs layer ( 520 ) and on opposite sides of the control electrode ( 526 ) and provides first and second current electrodes. When used to amplify a digital modulation signal, the semiconductor device ( 500 ) maintains linear operation over a wide temperature range. |
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Bibliography: | Application Number: US20050100095 |