Electro-static discharge (ESD) power clamp with power up detection

An ESD power clamp utilizes both a transient triggering method integrated together with a voltage level detection circuit to disable a MOSFET transistor forming the ESD power clamp unless the voltage level on a relevant power supply rail is higher than a predetermined level above the normal power su...

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Bibliographic Details
Main Authors GRIESBACH WILLIAM R, LEUNG CHE CHOI C
Format Patent
LanguageEnglish
Published 17.07.2007
Subjects
BASIC ELECTRONIC CIRCUITRY
CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
ELECTRICITY
EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
GENERATION
PULSE TECHNIQUE
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Summary:An ESD power clamp utilizes both a transient triggering method integrated together with a voltage level detection circuit to disable a MOSFET transistor forming the ESD power clamp unless the voltage level on a relevant power supply rail is higher than a predetermined level above the normal power supply voltage. When the voltage level of the power supply rail is higher than the predetermined level (e.g., 10% higher, 25% higher, etc.), then the power surge is presumed to be an ESD pulse, and thus the ESD power clamp is enabled to turn ON and discharge the ESD power surge.
Bibliography:Application Number: US20050049900