Edge seal for a semiconductor device

An edge seal around the periphery of an integrated circuit device which environmentally protects the copper circuitry from cracks that may form in the low-k interlevel dielectric during dicing. The edge seal essentially constitutes a dielectric wall between the copper circuitry and the low-k interle...

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Bibliographic Details
Main Authors NGUYEN DU BINH, AGARWALA BIRENDRA N, RATHORE HAZARA SINGH, ENGEL BRETT H, PROCTER RICHARD W, LLERA-HURLBURT DIANA, TIAN CHUNYAN E, DALAL HORMAZDYAR MINOCHER, LINIGER ERIC G
Format Patent
LanguageEnglish
Published 16.01.2007
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:An edge seal around the periphery of an integrated circuit device which environmentally protects the copper circuitry from cracks that may form in the low-k interlevel dielectric during dicing. The edge seal essentially constitutes a dielectric wall between the copper circuitry and the low-k interlevel dielectric near the periphery of the integrated circuit device. The dielectric wall is of a different material than the low-k interlevel dielectric.
Bibliography:Application Number: US20030694500