Semiconductor memory device
In a semiconductor memory device, sub-macros are connected sequentially onto an interface unit in which each sub-macro includes a data control unit connected to the interface unit through a global data line, a first memory block and a second memory block. The first memory block is connected to one s...
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Main Author | |
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Format | Patent |
Language | English |
Published |
09.01.2007
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Subjects | |
Online Access | Get full text |
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Summary: | In a semiconductor memory device, sub-macros are connected sequentially onto an interface unit in which each sub-macro includes a data control unit connected to the interface unit through a global data line, a first memory block and a second memory block. The first memory block is connected to one side of the data control unit through a first local data line, and the second memory block is connected to the other side of the data control unit through a second local data line. |
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Bibliography: | Application Number: US20060344016 |