Memory fence with background lock release

A technique releases locks associated with particular memory locations. The technique uses a "background" approach to determining when the locks should be released in that memory operations associated with the memory locations are monitored while instructions continue to execute on a proce...

Full description

Saved in:
Bibliographic Details
Main Author JETER, JR. ROBERT E
Format Patent
LanguageEnglish
Published 26.12.2006
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online AccessGet full text

Cover

More Information
Summary:A technique releases locks associated with particular memory locations. The technique uses a "background" approach to determining when the locks should be released in that memory operations associated with the memory locations are monitored while instructions continue to execute on a processor. The memory operations are monitored by generating a condition for each memory operation and clearing the condition when the operation completes. When all the conditions are cleared, the associated locks are released.
Bibliography:Application Number: US20020217023