Method and apparatus for translating guest physical addresses in a virtual machine environment

A method and an apparatus are used to efficiently translate memory addresses. The translation scheme yields a translated address, a memory type for the translated address, and a fault bit for the translation.

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Bibliographic Details
Main Authors NEIGER GILBERT, UHLIG RICHARD, GLEW ANDY, SMITH, III LAWRENCE O, KOZUCH MICHAEL A, BOLEYN ERICH S
Format Patent
LanguageEnglish
Published 17.10.2006
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A method and an apparatus are used to efficiently translate memory addresses. The translation scheme yields a translated address, a memory type for the translated address, and a fault bit for the translation.
Bibliography:Application Number: US20020084282