Memory controller driver circuitry having a multiplexing stage to provide data to at least N-1 of N data propagation circuits, and having output merging circuitry to alternately couple the N data propagation circuits to a data pad to generate either a 1x or Mx stream of data

A double data rate memory controller is provided with a plurality of data and strobe pads, means for receiving data and strobe signals via said pads at 1x double data rate memory speed, and means for receiving data and strobe signals via said pads at Mx double data rate memory speed (M>=2).

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Bibliographic Details
Main Authors HARGIS JEFFREY G, RENTSCHLER ERIC M, JOHNSON LEITH L
Format Patent
LanguageEnglish
Published 05.09.2006
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A double data rate memory controller is provided with a plurality of data and strobe pads, means for receiving data and strobe signals via said pads at 1x double data rate memory speed, and means for receiving data and strobe signals via said pads at Mx double data rate memory speed (M>=2).
Bibliography:Application Number: US20030695881