Method for programming programmable logic device with blocks that perform multiplication and other arithmetic functions

• Main Authors: BOURGEAULT MARK, AHMED ELIAS, FARRUGIA JENNIFER
• Format: Patent
• Language: English
• Published: 29.11.2005
• Edition: 7
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

A programming method efficiently programs programmable logic devices of the type having specialized multiplier blocks that include multipliers and other arithmetic function elements. Such blocks can be used to perform certain multiplication and multiplication-related functions more efficiently than general-purpose programmable logic. In order to efficiently program devices having such specialized multiplier blocks, so that they are used to their full potential and so that the maximum number of multiplier-related functions can be accommodated on a single programmable logic device, the programming method pre-processes the netlist of function blocks in a user's programmable logic design, grouping multiplication and multiplication-related functions efficiently. The method takes into account limitations imposed by the structure of the specialized multiplier blocks, in addition to location constraints imposed by the user and location constraints dictated by the need for certain functions be carried out near where certain other functions are carried out.