Protective side wall passivation for VCSEL chips

Methods for sealing or passivating the edges of chips such as vertical cavity surface emitting lasers (VCSEL) is disclosed. One method includes oxidizing the edges of die at the wafer level prior to cutting the wafer into a plurality of die. This may be accomplished by etching a channel along the st...

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Bibliographic Details
Main Authors NOHAVA JAMES C, STRZELECKA EVA M. B, LIU YUE, MORGAN ROBERT A
Format Patent
LanguageEnglish
Published 02.08.2005
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
DEVICES USING STIMULATED EMISSION
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Methods for sealing or passivating the edges of chips such as vertical cavity surface emitting lasers (VCSEL) is disclosed. One method includes oxidizing the edges of die at the wafer level prior to cutting the wafer into a plurality of die. This may be accomplished by etching a channel along the streets between die, followed by oxidizing the channel walls. The oxidation preferably oxidizes the aluminum bearing layers that are exposed by the channel walls inward for distance. Aluminum bearing layers, including AlAs and AlGaAs, may be oxidized to a stable native oxide that is resistant to further oxidation by the environment. After oxidation, the wafer can be cut along the channels into a number of die, each having a protective oxide layer on the side surfaces.
Bibliography:Application Number: US20030427237