Hardware debugging in a hardware description language

Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the te...

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Bibliographic Details
Main Authors BEARDSLEE JOHN MARK, SCHUBERT NILS ENDRIC, PERRY DOUGLAS L
Format Patent
LanguageEnglish
Published 07.06.2005
Edition7
Subjects
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Summary:Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.
Bibliography:Application Number: US20030406732