Input buffer circuit having equal duty cycle
An input buffer circuit includes a first differential circuit, a second differential circuit, a pull-up circuit, and a pull-down circuit. An input voltage and a reference voltage are provided to the first and second differential circuits. The first differential circuit detects rising edges of the in...
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Main Author | |
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Format | Patent |
Language | English |
Published |
16.11.2004
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | An input buffer circuit includes a first differential circuit, a second differential circuit, a pull-up circuit, and a pull-down circuit. An input voltage and a reference voltage are provided to the first and second differential circuits. The first differential circuit detects rising edges of the input voltage and causes the pull-up circuit to quickly drive an output voltage to logic high. The second differential circuit detects falling edges of the input voltage and causes the pull-down circuit to quickly drive the output voltage to logic low. |
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Bibliography: | Application Number: US20030388138 |