Low dielectric constant silicon oxide-based dielectric layer for integrated circuit structures having improved compatibility with via filler materials, and method of making same

• Main Authors: CATABAY WILBUR G, LI WEIDAN, HSIA WEI-JEN, ZHAO JOE W
• Format: Patent
• Language: English
• Published: 29.06.2004
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; CHEMICAL SURFACE TREATMENT; CHEMISTRY; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; COATING MATERIAL WITH METALLIC MATERIAL; COATING METALLIC MATERIAL; DIFFUSION TREATMENT OF METALLIC MATERIAL; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL; METALLURGY; SEMICONDUCTOR DEVICES; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION

An integrated circuit structure is disclosed wherein the capacitance between nearby conductive portions may be lowered using carbon-containing low k silicon oxide dielectric material, without contributing to the problem of via poisoning, by careful control of the carbon content of the dielectric material in two regions of the integrated circuit structure. The first region comprises the region between adjacent raised conductive lines formed over an underlying insulation layer, where undesirable capacitance may be formed horizontally between such adjacent conductive lines, while the second region comprises the region above the raised conductive lines where vias are normally formed extending upward from the raised conductive lines through the dielectric layer to an overlying layer of metal interconnects. In one embodiment, the carbon-containing low k silicon oxide dielectric material used in the first region between adjacent raised conductive lines has a high carbon content to provide maximum reduction of the dielectric constant of the dielectric material for maximum reduction in the horizontal capacitance developed between horizontally adjacent lines, while the carbon-containing low k silicon oxide dielectric material used in the second region above the raised conductive lines has a reduced carbon content to mitigate poisoning of vias formed through the dielectric material in this second region. In another embodiment both the first and second regions have the same or similar reduced carbon content in the carbon-containing low k silicon oxide dielectric material used in both of the respective first and second regions to thereby provide a carbon content sufficient to lower the undesirable capacitance formed horizontally between said adjacent raised conductive lines in said first region, but insufficient to cause via poisoning in vias formed in said second region.