Dry clean process to improve device gate oxide integrity (GOI) and reliability

• Main Authors: CHENG JUING-YI, LEE YU HWA, HO CHIN SHIUNG, HUANG YU BIN
• Format: Patent
• Language: English
• Published: 01.06.2004
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method for forming a gate silicide portion comprising the following steps. A substrate having a gate oxide layer formed is provided. A gate layer is formed over the gate oxide layer. An RPO layer is formed over the gate layer. A patterned photoresist layer is formed over the RPO layer exposing a portion of the RPO layer. The portion of the RPO layer having a patterned photoresist residue thereover. The structure is subjected to a dry plasma or gas treatment to clean the exposed portion of the RPO layer and removing the patterned photoresist residue. The RPO layer is etched using the patterned photoresist layer as a mask to expose a portion of the gate layer. The dry plasma or gas treatment preventing formation of defects or voids in the RPO layer and the poly gate layer during etching of the RPO layer. A metal layer is formed over at least the exposed portion of the gate layer. The structure is annealed to convert at least a portion of the metal layer and at least a portion of the underlying portion of the gate layer to form a gate silicide portion.