Memory-to-memory copy and compare/exchange instructions to support non-blocking synchronization schemes

A coherency technique for multiprocessor systems in which threads perform atomic read or atomic write transactions pursuant to memory-to-memory copy instructions or memory-to-memory compare-and-exchange instructions. Although the source reads and target writes are each atomic, the instruction is not...

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Bibliographic Details
Main Author ZAHIR ACHMED RUMI
Format Patent
LanguageEnglish
Published 16.03.2004
Edition7
Subjects
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