Multiple-mode CMOS I/O cell
A CMOS output cell with multiple output modes is disclosed. In one embodiment, the cell drives a differential output signal on two output pads in one mode and two single-ended output signals on the two output pads in another mode. Differential and single-ended driver transistors are included for thi...
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Main Author | |
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Format | Patent |
Language | English |
Published |
20.05.2003
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | A CMOS output cell with multiple output modes is disclosed. In one embodiment, the cell drives a differential output signal on two output pads in one mode and two single-ended output signals on the two output pads in another mode. Differential and single-ended driver transistors are included for this purpose. A logic circuit disables unused driver transistors, and supplies appropriate drive signals to those transistors for each mode. When disabled, the driver transistors serve an electrostatic discharge (ESD) protection function, at least partially alleviating the need for ESD-specific devices in the cell. The diminished need for ESD-specific devices allows the cell to offer a highly flexible chip interface, with little or no increase in circuit area over a conventional cell that offers only single-ended or differential output. |
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Bibliography: | Application Number: US20020150420 |