Apparatus and method for performing speculative cache directory tag updates

An apparatus and method for performing speculative directory cache tag updates for read accesses to memory is herein disclosed. A control unit for performing tag updates is coupled between the memory controller and the memory bank in a multiprocessor system that employs a directory-based coherency p...

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Bibliographic Details
Main Authors MCALLISTER CURTIS R, HUANG TERRY C, YU HENRY, DUGAN MICHAEL K, HEAP MARK A, GOSTIN GARY B
Format Patent
LanguageEnglish
Published 13.05.2003
Edition7
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:An apparatus and method for performing speculative directory cache tag updates for read accesses to memory is herein disclosed. A control unit for performing tag updates is coupled between the memory controller and the memory bank in a multiprocessor system that employs a directory-based coherency protocol. The control unit transmits data read from the memory bank to the memory controller while calculating the updated tag that it then writes back to the memory bank. In this manner, the memory bank busy time and memory bus traffic are reduced thereby improving the overall performance of a memory access.
Bibliography:Application Number: US20010797494