Process for forming shallow isolating regions in an integrated circuit and an integrated circuit thus formed

The formation of the isolating region includes ion implantation in the voluminal part, followed by annealing of said implanted voluminal part (7) of the substrate (1).

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Bibliographic Details
Main Authors LUNENBORG MEINDERT MARTIN, ARNAUD FRANCK, INARD ALAIN, DE COSTER WALTER JAN AUGUST
Format Patent
LanguageEnglish
Published 13.05.2003
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:The formation of the isolating region includes ion implantation in the voluminal part, followed by annealing of said implanted voluminal part (7) of the substrate (1).
Bibliography:Application Number: US20010933784