DSP control apparatus and method for reducing power consumption

A digital signal processor (DSP) control apparatus includes a DSP, estimation unit, calculation unit, and clock generator. The DSP performs digital signal arithmetic processing using a clock having a variable frequency. The estimation unit estimates an arithmetic processing amount of the DSP. The ca...

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Bibliographic Details
Main Author OGORO KAZUO
Format Patent
LanguageEnglish
Published 11.02.2003
Edition7
Subjects
CALCULATING
CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE
COMPUTING
COUNTING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS
MULTIPLEX COMMUNICATION
PHYSICS
TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE
TRANSMISSION
WIRELESS COMMUNICATIONS NETWORKS
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Summary:A digital signal processor (DSP) control apparatus includes a DSP, estimation unit, calculation unit, and clock generator. The DSP performs digital signal arithmetic processing using a clock having a variable frequency. The estimation unit estimates an arithmetic processing amount of the DSP. The calculation unit calculates a new clock frequency on the basis of an estimated arithmetic processing amount from the estimation unit. The clock generator supplies a clock having a frequency calculated by the calculation unit to the DSP.
Bibliography:Application Number: US19990412537