Testability architecture for modularized integrated circuits

• Main Authors: SABAN RAMI, SIDL YOMTOV, SHACHAM ALON, LIOR PELEG
• Format: Patent
• Language: English
• Published: 10.12.2002
• Edition: 7
• Subjects: MEASURING; MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES; PHYSICS; TESTING

A testability architecture and method for loosely integrated (modularized) integrated circuits uses stand alone module testing. For an integrated circuit chip which has a number of independent modules, where one module design is used in a number of different chips, each module is connected to the chip's input/output pins and to a configuration module. To make testing of the modules more efficient and less expensive, during testing of the chip a particular module design is confronted with the same testing environment regardless of the actual chip in which it is present. Advantageously, chip area is only slightly enlarged by the test circuitry. A test architecture of the configuration module includes test registers and carries out a standard protocol for all read and write transactions during testing. This approach provides better test coverage and economizes in test generation.