System and method for preventing electrochemical erosion by depositing a protective film

• Main Authors: AU WING KEI, LIU ALBERT H
• Format: Patent
• Language: English
• Published: 17.09.2002
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method for making reliable interconnect structures on a semiconductor substrate having a first dielectric layer is disclosed. The method includes depositing a glue layer of TiN followed by tungsten chemical vapor deposition after the contact or via is defined in the dielectric. Then, tungsten etchback or Chemical Mechanical Polishing (CMP) is performed to remove the tungsten and TiN over the dielectric surface with slight dishing of the tungsten within the plug. Next, a blanket deposition of Copper by electrochemical deposition is performed and Copper CMP is used to remove the copper from the dielectric surface while maintaining a coating of copper over the tungsten in the plug. Then, metal stack deposition, patterning and metal etching is performed and a barrier layer of silicon nitride is presented to minimize the copper diffusion. Finally, a deposition of an Interlevel Dielectric (ILD) is deposited. The deposition of a protective material such as copper above the tungsten in the plug blocks the dissolution pathway of tungsten in the highly alkaline post metal etch strip solvent. Copper is used as an example due to its favorable characteristic of being deposited and polished commercially, and the relatively low volatility of etch products (CuCl or CuCl2) during the metal etch whereas Cl2/BCl3 is the typical etch chemistry employed in semiconductor manufacturing. The deposition of silicon nitride after metal etch is essential to minimize the out-diffusion of copper into upper level dielectrics whereas the TiN glue layer minimizes the copper diffusion from the side of the vias or the contact.