Arrangement and method for polishing a surface of a semiconductor wafer

An arrangement for polishing a semiconductor wafer is disclosed. The arrangement includes a plurality of preassembled polishing pad assemblies which can be selectively coupled to, and decoupled from, an actuating mechanism for rotating the polishing pad assemblies. An associated method of polishing...

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Bibliographic Details
Main Authors PALLINTI JAYANTHI, NAGAHARA RON
Format Patent
LanguageEnglish
Published 27.08.2002
Edition7
Subjects
DRESSING OR CONDITIONING OF ABRADING SURFACES
FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
GRINDING
MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING
PERFORMING OPERATIONS
POLISHING
TRANSPORTING
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Summary:An arrangement for polishing a semiconductor wafer is disclosed. The arrangement includes a plurality of preassembled polishing pad assemblies which can be selectively coupled to, and decoupled from, an actuating mechanism for rotating the polishing pad assemblies. An associated method of polishing a semiconductor wafer is also disclosed.
Bibliography:Application Number: US20000750639