Burn-in test method for a semiconductor chip and burn-in test apparatus therefor

• Main Author: YAMAMOTO SHIGEHISA
• Format: Patent
• Language: English
• Published: 11.06.2002
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; MEASURING; MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES; PHYSICS; SEMICONDUCTOR DEVICES; TESTING

A burn-in test method and apparatus and a semiconductor chip to be used in a burn-in test method that allow current stress to be imposed on every circuit node by varying a power supply voltage in pulse form, and thereby enables an efficient burn-in test. A burn-in test is performed efficiently by im...