CMOS small signal switchable adjustable impedence terminator network

• Main Author: HUI DAVID T
• Format: Patent
• Language: English
• Published: 19.03.2002
• Edition: 7
• Subjects: BASIC ELECTRONIC CIRCUITRY; ELECTRICITY; PULSE TECHNIQUE

A terminator circuit for connection to a network can be fabricated and used within CMOS-SOI (complementary metal oxide semiconductor-silicon on insulator) for carrying small logic level signals for connecting data from a network's first circuit to a network's second circuit in which a network's input terminal connects a terminator circuit to the network's second circuit to act as a terminator on the data line passing data from said first circuit to said second circuit. The terminator circuit has a reference circuit coupled to a terminal circuit. The reference circuit has SOI devices back to back source coupled CMOS-SOI devices to each other for a tuned center reference voltage node, with their bodies connect to upper and lower level power supplies respectively. An upper level power source is connected to one side of the reference voltage node and a lower reference voltage power source is connected to the other side of the reference voltage node. The voltage level above the common tuned reference voltage and a lower level voltage is supplied to the terminator's corresponding input terminal circuit control nfet and pfet mirror devices whose bodies are also connected respectively to lower and upper level supply power to control each of their turn on voltages. Resistors of the reference path establish the swing voltage of the terminator as being that approximating an ideal 50 ohm split resistor terminator. A terminator inhibit control input circuit is coupled to the reference circuit and input circuit's to enable and disable the terminator network with a switching control signal. One or more terminal circuit adjustment sections enable one or more levels of impedance adjustment.