Modified gate conductor processing for poly length control in high density DRAMS
A semiconductor device includes a semiconductor substrate having an oxide layer thereon. A gate conductor is provided on the oxide layer, the gate conductor including a layer of polysilicon on the oxide layer, a tungsten silicide layer on the polysilicon layer, and a nitride cap layer on the tungste...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
12.02.2002
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | A semiconductor device includes a semiconductor substrate having an oxide layer thereon. A gate conductor is provided on the oxide layer, the gate conductor including a layer of polysilicon on the oxide layer, a tungsten silicide layer on the polysilicon layer, and a nitride cap layer on the tungsten silicide layer. The polysilicon layer has a length greater than length of the silicide layer and the nitride layer. Dielectric spacers on the gate conductor overlay the nitride cap layer and the tungsten silicide layer to provide a sidewall substantially flush with the polysilicon layer. Exposed polysilicon on the polysilicon layer is oxidized. |
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Bibliography: | Application Number: US19990325942 |