Method for improving performance and reliability of MOS technologies and data retention characteristics of flash memory cells
A method of fabricating a semiconductor device wherein there is provided a semiconductor substrate, preferably of silicon, having a gate insulator thereover, preferably of silicon dioxide, forming a junction, preferably a silicon/silicon dioxide interface, and a gate electrode, preferably of doped p...
Saved in:
Main Authors | , |
---|---|
Format | Patent |
Language | English |
Published |
04.12.2001
|
Edition | 7 |
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | A method of fabricating a semiconductor device wherein there is provided a semiconductor substrate, preferably of silicon, having a gate insulator thereover, preferably of silicon dioxide, forming a junction, preferably a silicon/silicon dioxide interface, and a gate electrode, preferably of doped polysilicon, over the partially fabricated device. Deuterium is implanted into the structure and the deuterium is caused to diffuse through the device. The device fabrication is then completed. |
---|---|
Bibliography: | Application Number: US20010788248 |