Silicon epitaxial wafer manufacturing method

• Main Authors: FUJIKAWA TAKASHI, NINOMIYA MASAHARU
• Format: Patent
• Language: English
• Published: 17.07.2001
• Edition: 7
• Subjects: AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUSPOLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR; BASIC ELECTRIC ELEMENTS; CHEMISTRY; CRYSTAL GROWTH; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; MEASURING; MEASURING QUANTITY OF HEAT; MEASURING TEMPERATURE; METALLURGY; PHYSICS; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITHDEFINED STRUCTURE; REFINING BY ZONE-MELTING OF MATERIAL; SEMICONDUCTOR DEVICES; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITHDEFINED STRUCTURE; SINGLE-CRYSTAL-GROWTH; TESTING; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL ORUNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL

The objective of this invention is to provide a manufacturing method wherewith optimally low-COP substrates can be efficiently manufactured for epitaxial wafers in order to obtain high epitaxial surface quality that will not have an adverse effect on device characteristics. A phenomenon was discovered whereby COPs are eliminated by solution annealing or flattening when epitaxial films are formed on wafers wherein the density of grown-in defects (COPs) with a size of 0.130 mum or larger is 0.03 defects/cm2 or lower, the use of which phenomenon is characteristic of the invention. For example, by pulling a monocrystal while deliberately controlling the carbon concentration therein to within a prescribed high range, and employing wafers cut from silicon monocrystal ingots grown with a pulling speed wherewith no OSF-ring outer region is present in the wafer surface, wafers having the low COP densities noted above are obtained, and the COPs are eliminated by solution-annealing or flattening when forming the epitaxial film, wherefore high-quality epitaxial wafers can be manufactured with good yield.