Multi-bank integrated circuit memory devices with diagonal pairs of sub-banks
Multi-bank integrated circuit memory devices include a plurality of banks of memory cells that are divided into pairs of sub-banks of memory cells. The sub-banks of memory cells are arranged in a plurality of rows and columns of sub-banks of memory cells. The pairs of sub-banks extend diagonally rel...
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Main Author | |
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Format | Patent |
Language | English |
Published |
15.05.2001
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | Multi-bank integrated circuit memory devices include a plurality of banks of memory cells that are divided into pairs of sub-banks of memory cells. The sub-banks of memory cells are arranged in a plurality of rows and columns of sub-banks of memory cells. The pairs of sub-banks extend diagonally relative to the plurality of rows and columns of sub-banks of memory cells. The pairs of sub-banks of the respective banks preferably are adjacent one another and extend diagonally relative to the plurality of rows and columns of sub-banks of memory cells. By providing diagonally extending sub-banks, the row address lines that extend between respective sub-banks of each bank may occupy reduced area. More specifically, row address lines that extend between pairs of sub-banks in same adjacent rows and same adjacent columns can cross over one another to thereby allow reduced area. |
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Bibliography: | Application Number: US19990351718 |