Liquid crystal display device with reduced source/drain parasitic capacitance and method of fabricating same

A liquid crystal display device having a plurality of data lines and a plurality of gate lines arranged perpendicular to each other and a plurality of thin film transistors and pixel electrodes formed for respective pixels includes a substrate and a gate electrode on the substrate. A first insulatin...

Full description

Saved in:
Bibliographic Details
Main Author LYU KI-HYUN
Format Patent
LanguageEnglish
Published 17.04.2001
Edition7
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:A liquid crystal display device having a plurality of data lines and a plurality of gate lines arranged perpendicular to each other and a plurality of thin film transistors and pixel electrodes formed for respective pixels includes a substrate and a gate electrode on the substrate. A first insulating layer is formed on the substrate and the gate electrode. An active layer is formed on the first insulating layer and an etch stop layer is formed on the active layer over the gate electrode. A silicide layer having first and second sides relative to the second insulating layer is formed on the surface of the active layer and a metal electrode is formed on the first side of the silicide layer. A pixel electrode is formed on the second side of the silicide layer and a third insulating layer is formed having a portion directly on the silicide layer.
Bibliography:Application Number: US19970910338