Method of forming interpoly dielectric and gate oxide in a memory cell

• Main Author: SUNG; KUO-TUNG
• Format: Patent
• Language: English
• Published: 24.10.2000
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method of fabricating an interpoly dielectric layer and a gate oxide layer of a programmable memory device. This method allows a gate oxide layer and a top oxide layer of the interpoly dielectric layer to be formed simultaneously by two consecutive processes, and essentially comprises the following steps: (1) forming a bottom oxide and a nitride layer of the interpoly dielectric layer on a floating gate of the memory device; (2) defining a gate oxide growing region on the interpoly dielectric layer with a photoresist mask; (3) etching the nitride and bottom oxide layer over the area defined as the gate oxide growth region; (4) forming a first oxide layer on the gate oxide growth region and the nitride of the interpoly dielectric layer above the floating gate; and (5) forming a second oxide layer on the first oxide layer to serve simultaneously as part of the top oxide layer of the interpoly dielectric layer and as part of the gate oxide layer.