Clock supply system

In each low-rate interface 1, a clock/frame pulse signal 16 is separated from a signal 11 outputted from a high-rate interface and coupled through a phase controller 6 for clock substitution in a clock substituting circuit 5. The phase controller 6 sets a phase delay as a result of design when makin...

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Bibliographic Details
Main Author KUROSAWA; KATSUHIKO
Format Patent
LanguageEnglish
Published 03.10.2000
Edition7
Subjects
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
MULTIPLEX COMMUNICATION
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:In each low-rate interface 1, a clock/frame pulse signal 16 is separated from a signal 11 outputted from a high-rate interface and coupled through a phase controller 6 for clock substitution in a clock substituting circuit 5. The phase controller 6 sets a phase delay as a result of design when making evaluation such that the phase of a signal 13 inputted to an exchanger 7 is coincident with the phase of its output signal 12. Thus simplifying the clock supply to low-rate interfaces in a multiplex transmission system, in which housings of a high-rate interface and the low-rate interfaces are physically separate from one another.
Bibliography:Application Number: US19970879269