Method for parallel programming of nonvolatile memory devices, in particular flash memories and EEPROMS

The programming method comprises the steps of applying a programming pulse to a first cell and simultaneously verifying the present threshold value of at least a second cell; then verifying the present threshold value of the first cell and simultaneously applying a programming pulse to the second ce...

Full description

Saved in:
Bibliographic Details
Main Authors CANEGALLO; ROBERTO, GERNA; DANILO, CHIOFFI; ERNESTINA, PASOTTI; MARCO, ROLANDI; PIER LUIGI
Format Patent
LanguageEnglish
Published 30.05.2000
Edition7
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
Online AccessGet full text

Cover

More Information
Summary:The programming method comprises the steps of applying a programming pulse to a first cell and simultaneously verifying the present threshold value of at least a second cell; then verifying the present threshold value of the first cell and simultaneously applying a programming pulse to the second cell. In practice, during the entire programming operation, the gate terminal of both the cells is biased to a same predetermined gate voltage and the source terminal is connected to ground; the step of applying a programming pulse is carried out by biasing the drain terminal of the cell to a predetermined programming voltage and the step of verifying is carried out by biasing the drain terminal of the cell to a read voltage different from the programming voltage. Thereby, switching between the step of applying a programming pulse and verifying is obtained simply by switching the drain voltage of the cells.
Bibliography:Application Number: US19980181230