Dynamic RAM in a microprocessor system

PCT No. PCT/IB96/01499 Sec. 371 Date Apr. 23, 1998 Sec. 102(e) Date Apr. 23, 1998 PCT Filed Dec. 20, 1996 PCT Pub. No. WO97/27547 PCT Pub. Date Jul. 31, 1997A microprocessor has RAS and CAS outputs for exclusive coupling, via a bus, to RAS and CAS inputs of a private DRAM. The microprocessor has a D...

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Bibliographic Details
Main Authors GOREN; AVNER, ZMORA; EITAN, GALANTI; DAVID
Format Patent
LanguageEnglish
Published 07.03.2000
Edition7
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:PCT No. PCT/IB96/01499 Sec. 371 Date Apr. 23, 1998 Sec. 102(e) Date Apr. 23, 1998 PCT Filed Dec. 20, 1996 PCT Pub. No. WO97/27547 PCT Pub. Date Jul. 31, 1997A microprocessor has RAS and CAS outputs for exclusive coupling, via a bus, to RAS and CAS inputs of a private DRAM. The microprocessor has a DRAM Control Register having at least one bit which is set to designate whether the DRAM is private to the microprocessor, a read circuit which reads the one bit and determines whether the bit is set, and a control logic circuit coupled to the read circuit for controlling functions of the microprocessor according to whether the DRAM is private to it.
Bibliography:Application Number: US19980817875