Local interconnection process for preventing dopant cross diffusion in shared gate electrodes

• Main Authors: HSIA; SHOULI, TSAI; JIUNN-YANN
• Format: Patent
• Language: English
• Published: 07.03.2000
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Disclosed is a process of electrically coupling the gate electrodes of an N-type transistor and a P-type transistor without causing substantial cross diffusion of P-type dopants into the N-type gate electrode and N-type dopants into the P-type gate electrode. This is possible because some or all annealing and diffusion steps are performed while the N-type and P-type gate electrodes are physically isolated from one another. Also disclosed is a Silicide as Diffusion Source process in which dopant atoms implanted in silicide regions diffuses out of the silicide regions and into the substrate to form source and drain diffusions. During this diffusion step adjacent N-type and P-type gate electrodes remain unconnected to prevent cross diffusion. Then, these two electrodes are electrically connected by a local interconnect. The local interconnection is a conductive path formed at about the level of the polysilicon (i.e., below a first metallization layer and above a substrate) and between two adjacent gate electrodes. In one case it is a tungsten plug formed in the space between an N-type polysilicon gate and a P-type polysilicon gate. In another case, it is a titanium nitride layer connecting the N-type and P-type polysilicon gates.