Multiplication, division and square root extraction apparatus

A multiplication, division and square root extraction apparatus which calculates the solutions to addition, division and square root extraction functions by approximation using iteration has a multiplier, an adder-subtracter and a shifter of prescribed bit width connected to a bus. Iteration is cond...

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Bibliographic Details
Main Authors NARITA; MASAHISA, NAKAMIKAWA; TETSUAKI, KAZIWARA; HISASHI, ASAI; TAKESHI, MORINAGA; SHIGEKI, NAKAGAWA; NORIO, TATEZAKI; JUNICHI, KIDA; HIROYUKI, KASHIWAGI; YUGO, KAWASAKI; SHUNPEI, WATABE; MITSURU
Format Patent
LanguageEnglish
Published 21.09.1999
Edition6
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A multiplication, division and square root extraction apparatus which calculates the solutions to addition, division and square root extraction functions by approximation using iteration has a multiplier, an adder-subtracter and a shifter of prescribed bit width connected to a bus. Iteration is conducted by inputting the output of the multiplier to the adder-subtracter or the shifter and returning the result to the input of the multiplier via the bus. A shifter and an arithmetic and logic unit connected to a second bus connected to the aforesaid bus via a switch have a greater bit width than the prescribed bit width and are used for large scale calculations, thus preventing a reduction in processing speed.
Bibliography:Application Number: US19970797653