Device isolation technology

Disclosed is a device isolation technology for defining active region of a semiconductor device. An oxide is formed on a semiconductor substrate in a first reaction chamber where a first gas containing silicon and a purge gas exist therein. Afterwards, the first temperature of the first reaction cha...

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Bibliographic Details
Main Authors PARK; TAE-YOUN, PARK; IN-OK
Format Patent
LanguageEnglish
Published 20.07.1999
Edition6
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Disclosed is a device isolation technology for defining active region of a semiconductor device. An oxide is formed on a semiconductor substrate in a first reaction chamber where a first gas containing silicon and a purge gas exist therein. Afterwards, the first temperature of the first reaction chamber is changed to second temperature by injection of a purge gas. A buffer film is formed on the oxide film in the first reaction chamber at the second temperature by injection of a silicon gas. Thereafter, a silicon nitride layer is formed on the buffer film in a second reaction chamber by injecting a second gas containing silicon. Lastly, field oxides are formed by a LOCOS technique through pattering of the three layers and thermal oxidation of exposed portions.
Bibliography:Application Number: US19960756893