High-performance fault tolerant computer system with clock length synchronization of loosely coupled processors
A fault-tolerant computer system employing multiple CPUs executing the same instruction stream under independent clock cycle timing. The CPUs deterministically execute the instructions internally until input or output operations require access to memory or devices which are not synchronous with the...
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Main Authors | , , , , |
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Format | Patent |
Language | English |
Published |
01.12.1998
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Edition | 6 |
Subjects | |
Online Access | Get full text |
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