Mesh planes for multilayer module

PCT No. PCT/EP95/02194 Sec. 371 Date Jan. 9, 1997 Sec. 102(e) Date Jan. 9, 1997 PCT Filed Jun. 7, 1995 PCT Pub. No. WO96/41376 PCT Pub. Date Dec. 19, 1996A multilayer module for packaging at least one electronic component 50. The module includes a plurality of thickfilm layers, and a wiring structur...

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Bibliographic Details
Main Authors FRECH; ROLAND, GARBEN; BERND, HARRER; HUBERT, KLINK; ERICH
Format Patent
LanguageEnglish
Published 22.09.1998
Edition6
Subjects
BASIC ELECTRIC ELEMENTS
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
SEMICONDUCTOR DEVICES
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Summary:PCT No. PCT/EP95/02194 Sec. 371 Date Jan. 9, 1997 Sec. 102(e) Date Jan. 9, 1997 PCT Filed Jun. 7, 1995 PCT Pub. No. WO96/41376 PCT Pub. Date Dec. 19, 1996A multilayer module for packaging at least one electronic component 50. The module includes a plurality of thickfilm layers, and a wiring structure 45 to permit the connection of on-module capacitors. The multilayer module is fabricated such that the wiring structure includes a partial mesh plane 46, 47, 48, and 49 between the topmost and second topmost layers of the thickfilm. Logic noise is reduced in the multilayer module by maximizing the mutual inductance between adjacent mesh planes.
Bibliography:Application Number: US19970765526