Method and apparatus for reducing clock switching noise in continuous time filters

A method and apparatus for reducing reference frequency signal and/or clock switching noise in self-tuned integrated continuous-time filters. In the master-slave automatic tuning scheme, one or more sample-and-hold circuits sample and hold the frequency control signal and Q-control signal generated...

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Bibliographic Details
Main Authors CRANFORD, JR.; HAYDEN CLAY, HUSS; SCOTT DAVID
Format Patent
LanguageEnglish
Published 24.03.1998
Edition6
Subjects
AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS
PULSE TECHNIQUE
RESONATORS
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Summary:A method and apparatus for reducing reference frequency signal and/or clock switching noise in self-tuned integrated continuous-time filters. In the master-slave automatic tuning scheme, one or more sample-and-hold circuits sample and hold the frequency control signal and Q-control signal generated by the feedback loop(s) of the automatic tuning system. The control signals are held at a constant level for a period of time during which the reference frequency signal and/or clock signal are quiescent. At one or more predetermined times, the frequency control and Q-control signals are intermittently updated to automatically tune the slave filter.
Bibliography:Application Number: US19960632976