Process for fabricating phase shift mask and process of semiconductor integrated circuit device

• Main Authors: TAKEKUMA; TOSHITSUGU, II; HARUO, ITO; KAZUYA
• Format: Patent
• Language: English
• Published: 14.10.1997
• Edition: 6
• Subjects: APPARATUS SPECIALLY ADAPTED THEREFOR; BASIC ELECTRIC ELEMENTS; CALCULATING; CINEMATOGRAPHY; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; ELECTROGRAPHY; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; HOLOGRAPHY; MATERIALS THEREFOR; ORIGINALS THEREFOR; PHOTOGRAPHY; PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES; PHYSICS; SEMICONDUCTOR DEVICES; TECHNICAL SUBJECTS COVERED BY FORMER USPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ARTCOLLECTIONS [XRACs] AND DIGESTS

When the data of a mask pattern of a phase shift mask is to be made, the pattern data is separated into a real pattern data layer having the data of real patterns and a phase shift pattern data layer having the data of phase shift patterns. After this, it is verified whether or not the mask pattern satisfies the regulation of the gap of in-phase patterns, in which lights having transmitted through patterns adjacent to each other are in phase. It is also verified whether or not the mask pattern satisfies the regulation of the gap of out-of-phase patterns, in which lights having transmitted through patterns adjacent to each other are out of phase.